FPGA vs ASIC: LEGO vs Injection Molding
"Why do Bitcoin Miners look like that?"
Early Bitcoin was mined with CPUs. Then GPUs took over. Then suddenly, weird machines called 'Miners (ASICs)' appeared everywhere.
Why not just use regular computers? Why build dedicated machines?
To answer this, I dove into the two titans of semiconductor design: FPGA and ASIC. At first, I thought "they're both chips, what's the difference?" But I quickly learned they're as different as LEGO blocks and injection-molded plastic toys.
Understanding this difference unlocked why Tesla builds their own FSD chips, why Google developed TPUs, and why Bitcoin mining companies go bankrupt when algorithms change.
1. The Confusion: "They're both chips, right?"
When I first encountered FPGA and ASIC, I honestly couldn't tell them apart. They're both "semiconductor chips" that "perform calculations," so what's the big deal?
But as I dug deeper, I realized the way they're made is fundamentally different.
FPGA lets you reprogram the internal circuits of an already-manufactured chip. The chip itself stays the same, but you can change how the logic gates (AND, OR, NOT, etc.) are connected using software.
ASIC, on the other hand, means you design circuits from scratch and bake them into silicon wafers. Once made, that's it. No modifications.
Once I understood this, the phrase "FPGA is general-purpose, ASIC is custom-made" clicked.
2. FPGA: LEGO Blocks (Swiss Army Knife)
FPGA (Field-Programmable Gate Array) is exactly what the name suggests: a chip "Programmable in the Field" (meaning after manufacturing).
2-1. Internal Structure: LUTs and CLBs
Inside an FPGA, you'll find LUTs (Look-Up Tables)—small chunks of memory that can store combinational logic functions. A typical FPGA has tens of thousands to millions of these LUTs.
For example, a 4-input LUT can store a truth table like this:
| A | B | C | D | Output |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 0 | 1 | 1 |
| ... | ... | ... | ... | ... |
These LUTs are grouped into CLBs (Configurable Logic Blocks), which are interconnected by a "Routing Fabric"—a mesh of programmable wires.
So an FPGA is essentially "pre-made LEGO blocks (LUTs) and connectors (Routing) that you assemble to build your desired circuit."
2-2. Real Code: Building an AND Gate in Verilog
FPGAs are programmed using HDL (Hardware Description Language)—typically Verilog or VHDL.
Here's a simple 2-input AND gate in Verilog:
module and_gate(
input wire a,
input wire b,
output wire y
);
assign y = a & b;
endmodule
When you load this code onto an FPGA, one of its LUTs becomes a circuit that "takes inputs a and b, and outputs their AND result."
"Writing code changes the chip's circuitry"—that blew my mind. As a software developer, I thought "code lives in memory," but with FPGAs, code becomes hardware circuits.
2-3. Analogy: Swiss Army Knife
Think of an FPGA as a Swiss Army Knife:
- It has a knife, scissors, screwdriver, bottle opener—all in one tool.
- You use whichever tool you need.
- But it's not as sharp as a professional chef's knife, not as precise as dedicated scissors.
Same with FPGAs:
- Today it processes 5G signals, tomorrow it accelerates AI inference.
- But because it's "designed for all possibilities," it's slower and less power-efficient than specialized chips.
2-4. Where FPGAs Shine
So where are FPGAs actually used? From my research:
- 5G/6G Base Stations: Communication standards keep evolving, so FPGAs let you update via firmware without hardware replacement.
- Data Center Accelerators: Microsoft Azure embeds FPGAs in servers to accelerate AI inference, encryption, and compression.
- High-Frequency Trading (HFT): Trading algorithms change constantly—no time to design ASICs. FPGAs let you rapidly switch strategies.
- Prototype Validation: Semiconductor companies test their designs on FPGAs before committing to expensive ASIC production.
Bottom line: FPGAs thrive "where flexibility is critical."
3. ASIC: Injection-Molded Plastic (Surgical Scalpel)
ASIC (Application-Specific Integrated Circuit) is a chip "dedicated to one specific task."
Bitcoin miners (like Antminer) are classic ASICs. These chips do absolutely nothing except SHA-256 hashing. They can't run Windows or play Minesweeper.
But for that one task—SHA-256 computation—they're 100x faster than FPGAs and use 1/100th the power.
3-1. ASIC Design Flow: From RTL to Tapeout
The ASIC creation process is completely different from software development. Here's what I learned:
- RTL Design: Write the chip's behavior in Verilog/VHDL (similar to FPGA)
- Logic Synthesis: Convert RTL code into actual gates (AND, OR, NOT, etc.)
- Place & Route: Decide how to position gates on silicon and how to connect them with wires
- Timing Verification: Ensure signals arrive on time (meet clock frequency requirements)
- Tapeout: Send final design files to a foundry (TSMC, Samsung) to fabricate on wafers
- Mass Production: Cut wafers into individual chips and package them
This process takes at least 6 months to 2 years. And once you tape out, there's no going back.
If there's a bug in your design? You scrap all the chips and start over. That's why people say "one bad chip design can bankrupt a company."
3-2. NRE Costs: Why 7nm ASICs Cost $500M+
ASIC design involves NRE (Non-Recurring Engineering) costs—one-time upfront expenses including:
- Engineering Salaries: Semiconductor design engineers are expensive (millions per project)
- EDA Tool Licenses: Cadence, Synopsys design tools cost hundreds of thousands to millions per year
- Mask Fabrication: Photomasks used to etch circuits onto wafers. For 7nm process, one mask set costs $3M–$10M.
The smaller the process node, the more expensive masks become:
- 28nm: $500K
- 7nm: $5M
- 3nm: $15M+
So designing a 7nm ASIC requires $50M–$500M in NRE alone. Obviously, individuals and small companies can't afford this.
But if you stamp out 1 million chips, unit cost drops to $1–$10. That's the economics of ASICs.
3-3. Analogy: General Store vs Specialized Surgery Room
Let me give another analogy for FPGA vs ASIC:
- FPGA: Neighborhood hardware store. Has hammers, saws, screwdrivers, nails—you can build anything, but it's not professional-grade.
- ASIC: Orthopedic surgery room. Does one thing only—joint replacement surgery. But it's world-class at that one thing.
This reminds me of my own product development. I started with a "general framework (Django)" for quick MVP, then migrated to "optimized microservices (Go)" later. It's exactly the same FPGA → ASIC progression.
3-4. Notable ASIC Examples
- Bitcoin Miner (Antminer S19): SHA-256 only. 110 TH/s (terahashes/sec). 100x+ faster than GPUs.
- Google TPU: TensorFlow operations only. Specialized for AI inference/training. 15–30x faster than GPUs.
- Apple M-Series: Integrates multiple ASIC blocks in one chip—Neural Engine (AI), Secure Enclave (security), Media Engine (video processing).
- Tesla FSD Chip: Autonomous driving neural network inference only. 21x faster than NVIDIA GPUs at 1/10th the power.
4. Bitcoin Mining Evolution: CPU → GPU → FPGA → ASIC
This was what got me interested in FPGA vs ASIC in the first place. Here's how Bitcoin mining evolved:
4-1. 2009–2010: CPU Era
- When Satoshi Nakamoto created Bitcoin, people mined with regular computer CPUs.
- An Intel Core i7 could mine 50 BTC per day (worth $2M+ today).
4-2. 2010–2013: GPU Era
- Someone realized "graphics cards are good at parallel computation."
- Mining with NVIDIA/AMD GPUs was 10–100x faster than CPUs.
- "Mining rigs with 5 GPUs" became a thing worldwide.
4-3. 2011–2013: FPGA Era
- Enthusiasts seeking better efficiency tried FPGAs.
- Implementing SHA-256 on Xilinx Spartan-6 FPGAs yielded 3–5x better power efficiency than GPUs.
- But FPGAs were hard to program and expensive, so they never went mainstream.
4-4. 2013–Present: ASIC Era
- In 2013, a Chinese company called Bitmain launched the Antminer.
- SHA-256-only ASIC chips. 100x faster than GPUs at 1/10th the power.
- GPU/FPGA mining went extinct. Today, if you're not using ASICs, you're losing money.
Watching this evolution taught me: "general → specialized" is the inevitable path of technology. Whether it's software, hardware, or business—everything follows the same trajectory.
5. FPGA vs ASIC: When to Use What?
Here's my decision framework:
Use FPGA when:
- Prototyping: Test designs before committing to expensive ASIC production
- Low Volume: If you need fewer than 1,000 units, FPGAs are cheaper
- Algorithm Changes Frequently: Telecom, HFT, military encryption
- Time to Market is Critical: ASICs take 6 months–2 years; FPGAs take weeks
Use ASIC when:
- Mass Production: 1 million+ units make unit costs plummet
- Performance/Power Efficiency Matters: Mobile, data centers, autonomous vehicles
- Algorithm is Fixed: SHA-256, H.264, specific neural networks
- You Can Afford NRE: At least $5M–$50M upfront investment
6. Code Example: Software vs FPGA
Let's compare the same operation implemented in software vs FPGA.
Software (Python)
def multiply_add(a, b, c):
result = a * b + c
return result
# Execution: CPU sequentially processes instructions
# 1. Calculate a * b
# 2. Add c to result
# 3. Return
FPGA (Verilog)
module multiply_add(
input wire [31:0] a,
input wire [31:0] b,
input wire [31:0] c,
output wire [31:0] result
);
wire [31:0] product;
assign product = a * b;
assign result = product + c;
endmodule
// This isn't "instructions"—it's a "circuit structure."
// a * b and + c are implemented as actual hardware,
// completing in 1–2 clock cycles.
See the difference? Software is "telling the CPU what to do," while FPGA is "the chip itself becomes the circuit that does the operation."
That's why FPGAs have extremely low latency. Input signals arrive, and results come out in just a few clock cycles. Software involves function calls, memory access, cache misses—hundreds of cycles.
7. Summary: It All Comes Down to Money and Time
Studying FPGA vs ASIC reinforced a key lesson: "Technology choices are ultimately about economics."
| Aspect | FPGA | ASIC |
|---|---|---|
| Analogy | LEGO Blocks (Rebuildable) | Injection Mold (Fixed) |
| Flexibility | High (Modify anytime) | None (Done is done) |
| Initial Cost | Low ($10K–$100K) | Very High ($5M–$500M) |
| Unit Price | Expensive ($100–$10K) | Cheap ($1–$10 at scale) |
| Power Efficiency | Medium | Best (10–100x better than FPGA) |
| Development Time | Short (weeks to months) | Long (6 months to 2 years) |
| Best For | Prototypes, low volume, algorithm changes | Mass production, performance/power critical, fixed algorithm |
To me as a developer, FPGAs feel like software ("just rewrite if it breaks"), while ASICs feel like hardware manufacturing ("one bug and the company goes under").
I now understand why Tesla builds their own FSD chips—Intel CPUs and NVIDIA GPUs (general-purpose chips) weren't good enough, so they etched their own custom ASIC.
And I finally know why Bitcoin miners look the way they do. They went "all-in on doing SHA-256 as fast as possible."
In the end, semiconductors, software, and business all follow the same principle: Start general-purpose, then specialize as you scale. That's the story of FPGA and ASIC.