Bus System: The Hardware Highway and the 4GB RAM Limit

11. Summary and Conclusion

The journey started with Jaemin's question: "Why can't my 8GB RAM work beyond 4GB?"

Key takeaways:

1. Address Bus Width = Max Memory Capacity
   • 32-bit address bus → 2³² = 4GB
   • 64-bit address bus → 2⁶⁴ = practically infinite
2. The Trinity of Buses
   • Address Bus: Where
   • Data Bus: What
   • Control Bus: When/How
3. Von Neumann Bottleneck is Eternal
   • Inherent limitation of separated CPU and memory
   • Can mitigate with cache, DDR, multi-channel, but not fundamentally solve
4. PCIe Lanes Determine GPU Performance
   • RTX 4090 on PCIe 3.0 = performance loss
   • Motherboard isn't just a board—it defines bus quality
5. USB = History of Bus Convergence
   • PS/2, serial, parallel → USB → USB-C
   • USB4 = absorbed Thunderbolt = one cable for everything
6. Bus is a Shared Resource Requiring Arbitration
   • Bus Arbitration for traffic control
   • CPU, DMA, GPU wait their turn
7. Death of FSB and Integrated Memory Controllers
   • Eliminated bottleneck FSB by moving memory controller into CPU
   • Evolved into QPI/UPI/Infinity Fabric
8. Modern Computing Impossible Without DMA
   • If CPU manually moved all data, multitasking impossible
   • NVMe achieves 7GB/s thanks to DMA

Every computer performance problem ultimately reduces to "How fast can we move data?" A fast CPU is useless if data doesn't arrive, and a great GPU is bottlenecked by slow PCIe.

Now I can confidently tell Jaemin:

"Dude, reinstall with 64-bit. With a 32-bit address bus, you can only create 2^32 = 4.3 billion addresses. That's 4.3 billion bytes = 4GB. Even though you have 8GB physically, the rest has no address numbers, so it's inaccessible. Got it?"